 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Ver1.0 A1 PROs 1 A1 PROs AI1001S Vertical Clock Driver for Camera System Description The AI1001S is a clock driver for the vertical resister drive of CCD. AI1001S is well suited for the B/W or color CCD camera and camcorder in NTSC or PAL camera system. Pin Configuration Vi2 Vi1 ViS1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VSS(-10V) V o 2 V o 1 VP0(0V) V o 3 V o 4 VSUB VP1(+15V) Feature -. 4 channel vertical clock driver and 1 channel substrate driver. -. Implemented with high voltage(+50V) and high performance CMOS process. Vi3 ViS2 Vi4 ViSUB VDD(+5V) 16 PIN SOP / SSOP ( Top View ) Absolute Maximum Ratings (Ta = 25 E ) Parameter Supply voltage Input voltage Output voltage Operating temperature Storage temperature Symbol Vss VDD, VP0, VP1 VI V o, V o 2 4 V o , V o, VSub 1 3 TOPR TSTG Rating Reference voltage Vss -.3 to Vss+35 0 Vss -.3 to VDD+0.3 0 Vss -.3 to VP0+0.3 0 Vss -.3 to VP1+0.3 0 -25 to +85 -40 to +125 Unit V V V V V E E Recommended Operating Conditions Parameter Supply Voltage Operating temperature Symbol VDD VP0 VP1 TOPR Rating Vss +15 Vss +10 Vss +25 -20 to +75 Unit V V V E 1 AI1001S VSS(-10V) VP0(0V) VP1(+15V) 9 VDD(+5V) 8 Block Diagram 16 15 14 13 12 11 10 1 Vi2 2 Vi1 3 ViS1 4 Vi3 5 ViS2 6 Vi4 Truth Table Input Vi 1 , 3 L L H H ViSUB VSUB 7 Vo2 Vo1 Vo3 Vo4 Vi S 1 , 2 L H L H Vi 2 , 4 Vi SUB V o,3 1 Output V o,4 2 VSUB VP1 VP0 *Z VSS L H L H VP0 VSS VP1 VSS * Z is high impedance. Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol Vi2 Vi1 ViS1 Vi3 ViS2 Vi4 ViSUB VDD VP1 VSUB V o 4 V o 3 VP0 V o 1 V o 2 VSS I/O I I I I I I I O O O O O - Description Output control (V o) 2 Output control (V o) 1 Output control (V o) 1 Output control (V o) 3 Output control (V o) 3 Output control (V o) 4 Output control (VSUB) Power supply (+5V) Power supply (+15V) Output (2 level : VP1, VSS) Output (2 level : VP0, VSS) Output (3 level : VP1, VP0, VSS) Power supply (0V) Output (3 level : VP1, VP0, VSS) Output (2 level : VP0, VSS) Power supply (-10V) 2 AI1001S DC Characteristics (TA=25 E VDD = 5V, VSS = -10V, VP0 = 0V, VP1 = 15V) , Item Input high voltage Input low voltage Output high voltage Output middle voltage Output middle voltage Output low voltage Input current Power supply current Power supply current Power supply current Symbol VIP1 VISS V V V V P o1 P o0 P o0 S oS Test Condition Min 3.5 Typ Max 1.5 Unit V V V I o1 = - 20 E P I o0 = - 20 E P I o0 = 20 E P I oS = 20 E S 14.9 15 0 0.1 V V -0.1 0 -10 1.0 0.3 0.15 4.5 0.5 0.3 5.0 -9.9 V E I I I IIN IPD IPI IP0 Switching Characteristics (See the Test Circuit TA = 25 E VP1=15V, VP0=0V, VDD=5V, VSS= -10V) , Item Output Current Output Current Output Current Output Current Output Current Output Current Rise time VSS ae VP0 Fall time VP0 ae VSS Rise time VP0 ae VP1 Fall time VP1 ae VP0 Rise time VP0 ae VP1 Fall time VP1 ae VSS Coupling amplitude (middle level) Coupling amplitude (low level) Symbol IL IM1 IM2 IH ISL I TTLM TTML TTMH TTHM TTLHH TTHHL VCOM VCOL V o to V 1 V o to V 1 V o, V 1 V o, V 1 3 o 3 o 4 o 4 o Conditions = -9.5V = -0.5V Max. Min. Unit -25 10 -9 12 -12 12 1000 1000 1000 1000 200 200 0.5 0.5 I I I I I I ns ns ns ns ns ns V V = 0.5V = 14.5V VSUB = -9.5V VSUB = 14.5V V o to V 1 V V V 1 o,3 1 o,3 1 o,3 4 o = -0.5V after input transient after input transient after input transient after input transient = -9.5V = 14V = 1V VSUB = 14V VSUB = -9.5V V o to V 1 V o to V 1 4 o 4 o 3 AI1001S Test Circuit AI1001S 1 Vi2 VP1 VP0 15V 0V 16 VSS(-9V) R1-R4 : 27 Ohm R5 : 5 Ohm C1-C4 : 1500 pF C5-C8 : 3300 pF C9 : 500 pF R1 R5 2 Vi1 a (L,L) (L,H) 15 V o 2 Decoder TIMING GENERATOR 3 ViS1 b (H,H) 14 -10V VSS VP1 VP0 V o 1 R2 C2 C5 C7 C3 C6 C8 4 Vi3 a (L,L) (L,H) 13 VP0(0V) C1 Decoder 5 ViS2 b (H,H) 12 VSS V o 3 R3 C4 6 Vi4 11 V o 4 R4 7 ViSUB 10 VSUB C9 8 VDD(+5V) 9 VP1(+15V) *(L, H) means the on-status of the switch when a = "L", b = "H". 4 AI1001S Test Circuit I/O Waveform Diagram Input waveform Vi1 EIA :2.51 A CCIR:2.53 A Vi3 ViS1 ViS2 Output waveform +15 TTMH TTLM TTHM V 1 o 0 -10 +15 TTMH TTML TTHM V 3 o 0 -10 +5 ViSUB 0 TTLHH +20 TTHHL VSUB -10 5 AI1001S Input waveform (Repeat Cycle 15.7kHz) +5 Vi1 0 +5 Vi2 Vi3 Vi4 0 +5 0 +5 0 600ns Output waveform 0 TTML TTLM V 1 o -10 0 TCOM V 2 o -10 0 VCOL V 3 o -10 0 V 4 o -10 6 SENSOR +15V VP1(15V) +5V VSUB ViSUB Vi4 ViSUB AI1001S Timing Generator 8 7 6 5 ViS2 Vi3 9 VDD(5V) 0.1/50 Application Circuit VSUB 11 11 Vo4 ViS2 Vi4 10 12 11 10 9 8 7 ViS1 13 Vo4 1 12 Vo3 Vi3 Vo3 2 13 VP0(0V) ViS1 4 3 2 1 Vo1 4 Vo1 Vi1 14 15 Vo2 VSS(-9V) Vi2 -9V Vo2 3 16 Vi1 7 Vi2 KDS226 VR 10k or EVR for color digital camera system. 1M 3.3k AI1001S AI1001S Package Dimension ( AI1001S : 16 PIN SSOP ) UNIT = inch (mm) 08 O O 0.037(0.95) 0.022(0.55) 0.212(5.38) 0.205(5.20) 0.311(7.90) 0.301(7.65) 0.009(0.22) 0.005(0.13) 0.0256 (0.65) 0.015(0.38) 0.010(0.25) 0.078(1.99) 0.068(1.73) 0.249(6.33) 0.239(6.07) BASE PLANE SEATING PLANE 0.008(0.21) 0.002(0.05) 8 |
Price & Availability of AI1001S
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |